The present disclosure relates to photonic integrated circuit (PIC) die packaging, and more specifically, to PIC die packaging having side optical fiber connections.
Current photonic integrated circuit (PIC) dies require complex packaging integration schemes. One challenge is providing optical coupling between the PIC die and external optical links such as optical fibers or polymer waveguides. For example, very precise alignment tolerances must be observed when attaching input and output fibers to efficiently couple light between the optical waveguides of the PIC die and off-module connections. Another challenge is that these PIC die often require surface wire bonding interconnections to their support or carrier substrate and therefore typically have a low number of electrical input/output connections. The wire bonding provides limited perimeter electrical input/outputs unless using very fine pitch interconnects. Additionally, the wiring bonding makes it difficult to efficiently cool the PIC die since heat flow from the back of the PIC die is into a laminate versus a direct heat spreader contact to the backside of the die as with a flip chip attached die. Flip chip integration of PIC dies can provide more electrical inputs/outputs, however the V-grooves for optical fiber alignment to the PIC waveguides are on the device side of the PIC die, which makes flip chip integration of such PIC dies challenging because the V-grooves are not easily accessible for fiber connections after flip chip assembly of the PIC die. Furthermore, the current photonics packaging technology provides low component integration density, particularly where ancillary devices such as trans-impedance amplifiers (TIAs), drivers, memory and passive components need to be integrated in a single module.